lowRISC News

OpenTitan® Partnership Makes History as First Open-Source Silicon Project to Reach Commercial Availability

February 13, 2024

Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market CAMBRIDGE, England – February 13, 2024 – lowRISC C.I.C., the open silicon ecosystem organization, and the OpenTitan coalition today announced a historic milestone as the first open-source silicon project to reach commercial availability, with validated chips in hand. The capstone moment is the result of an unprecedented amount of support and investment by the nine coalition members, including Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient, hosted by the non-profit lowRISC CIC.

Unveiling Sonata: Affordable CHERI Hardware for Embedded Systems

January 15, 2024

The lowRISC®/Sunburst team are pleased to announce that the initial Sonata prototype boards have been manufactured by our wholly owned subsidiary NewAE and are currently being tested, marking a significant milestone towards our goal of making CHERI technology widely available to embedded systems engineers. lowRISC®’s Sonata Board - powered up and running! Ibex Inside The CHERIoT Ibex core lies at the heart of the Sonata system. Ibex is a production-quality, open-source 32-bit RISC-V CPU core, written in SystemVerilog.

Sunburst Project Update

December 19, 2023

The Sunburst Project, supported by DSbD/UKRI grant (#107540), focuses on enhancing security within the embedded and operational technology (OpTe) sectors. Its primary goal is to promote the adoption of CHERIoT, an open-source microcontroller technology that integrates CHERI capabilities within the RISC-V architecture. Today lowRISC and NewAE are pleased to announce we’ve already made significant strides towards that goal, which we’ll briefly review in this blog! But first, a little history of how we got here, what CHERI is all about, and why it matters.

OpenTitan® Partnership Announces First Public Secure Execution Environment for Integrated

November 13, 2023

Open Silicon Coalition Rapidly Develops Integrated Secure Execution Environment with the Silicon Commons Ecosystem CAMBRIDGE, England and BOSTON – November 13, 2023 – lowRISC C.I.C., the open silicon ecosystem organization, and zeroRISC, the first provider of commercial cloud security services for open silicon, today announced the early release of the first SoC secure execution environment, including root of trust (RoT) functionality, as part of the OpenTitan project. This major milestone comes only six months after the tapeout of OpenTitan’s first discrete design, demonstrating significant momentum for all participating partners.

lowRISC Announces New OpenTitan Project Partner, zeroRISC

October 30, 2023

The OpenTitan coalition continues to expand as the technology approaches commercial availability CAMBRIDGE, England – October 30, 2023 – lowRISC C.I.C., the open-source silicon ecosystem organization, today announced zeroRISC has joined the OpenTitan project. zeroRISC is a startup focused on providing a cloud security service for silicon that delivers transparency and trustworthiness for data centers and ICS/OT, IoT and edge devices. The company played a key role in accomplishing the first OpenTitan tapeout and is driving efforts to validate the first discrete chip and bring the device to commercial production.

lowRISC Announces Expansion of OpenTitan Project with New Hardware

October 20, 2023

New Boards Allow Leading Developers and Organizations Globally to Contribute to the Project CAMBRIDGE, United Kingdom – October 20, 2023 – lowRISC C.I.C., the open source system on chip (SoC) organization, today announced the commercial availability of two pieces of hardware crucial for research and development with OpenTitan, a project creating the world’s first open source silicon root of trust (RoT) designs. The NAE-CW310-K410T (Bergen Board) and the new, larger NAE-CW340-OTKIT (Luna Board) are now available for purchase exclusively from trusted global distributor Mouser, and addresses the overwhelming demand from OpenTitan partners, organizations and academic institutions wanting to run the full OpenTitan design — or subcomponents of that design — in a flexible FPGA-based emulation platform.

lowRISC Extends UKRI’s Digital Security by Design Programme Support Into Operational Technology

September 12, 2023

UK Research and Innovation (UKRI) recently announced that its CHERI-based Digital Security by Design Programme (DSbD) technologies have already demonstrated significant value in sectors where high integrity, resilient, and safety-focused applications are paramount, including avionics, automotive and embedded systems. DSbD aims to provide foundational support to developers centred around a technology enhancement in the central processor (CPU): Capability Hardware Enhanced RISC Instructions, or (CHERI). CHERI has the potential to prevent around 2/3rds of current exploits, whilst simultaneously providing new software methods to help maintain the operational resilience and integrity of applications.

Ibex Inside: How and Why We Built OpenTitan’s RISC-V Core

July 17, 2023

OpenTitan® recently announced the RTL freeze of Earl Grey, the first chip tapeout of its open source silicon root of trust (RoT). The first engineering samples should be in our hands before the end of the year. OpenTitan’s mission is to provide a secure root of trust, which is complemented by a secure processor core. To address this need, we elevated one of the most widely deployed, highest quality RISC-V cores in academia to the industrial-level of quality characteristic of this project.

OpenTitan’s RTL Freeze - Leveraging Transparency to Create Trustworthy Computing

June 16, 2023

We are delighted to announce an important development for OpenTitan®: RTL Freeze for the Earl Grey discrete, the first OpenTitan chip tapeout. This milestone is a source of immense pride for lowRISC and our OpenTitan partners, because it’s a concrete demonstration of the success of the Silicon Commons™ approach to making silicon radically more transparent and trustworthy. In partnership with Nuvoton, a major TPM vendor, this RTL freeze means that the OpenTitan coalition will have engineering samples of the discrete silicon root of trust (RoT) this calendar year.

A Major Milestone for OpenTitan

April 20, 2023

We are excited to announce today that the OpenTitan project has hit a major tapeout milestone: a feature freeze of its open-source RTL. Together with our partners, we began the OpenTitan project in 2019 with the goal of producing the world’s first open-source silicon Root of Trust (RoT). With this new achievement we are a step closer to realising that goal. Getting to this point has taken a lot of coordinated work, as we’ve had to navigate the many stumbling blocks that have traditionally made open-source silicon development a challenge.