A guide to the development environment

System requirement

We recommend you work with a 64-bit Ubuntu (14.04 LTS) system with GNU GCC >= 4.8 installed. If necessary, create such a setup using VMware Workstation Player or VirtualBox.

The default simulator for RTL/Behavioural SystemVerilog simulation is Verilator. Please download and install a latest version for the best SystemVerilog support.

An FPGA demonstration is provided using either a Xilinx Kintex-7 FPGA KC705 evaluation kit or a low-end Nexys™4 DDR Artix-7 FPGA Board. The KC705 kit comes with a device and node locked license for Xilinx Vivado Design Suite. The default version for FPGA demonstration project is Vivado 2015.4(64-bit). As for the users of the Nexys4-DDR boards, please acquire a free license and install the WebPACK edition of Vivado.

By default, all simulations produce waveforms in the VCD format.
GTKWave can be used to view VCD files.

Here shows software versions and environment variables on my machine:

 # it is better to use bash
 $ echo $0
 bash

 $ uname -s -v -r -i -o
 Linux 3.13.0-66-generic #108-Ubuntu SMP Wed Oct 7 15:20:27 UTC 2015 x86_64 GNU/Linux

 # make sure the RISCV variable is exposed
 $ echo $RISCV
 /home/USER_NAME/proj/lowrisc-chip/riscv

 $ gcc --version
 gcc (Ubuntu 4.8.4-2ubuntu1~14.04) 4.8.4
 Copyright (C) 2013 Free Software Foundation, Inc.
 This is free software; see the source for copying conditions.  There is NO
 warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

 $ which verilator
 /local/tool/verilator/bin/verilator

 $ gtkwave --version
 GTKWave Analyzer v3.3.58 (w)1999-2014 BSI

 This is free software; see the source for copying conditions.  There is NO
 warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

 $ which vivado
 /local/tool/Xilinx/Vivado/2015.4/bin/vivado

 # make sure the XILINX_VIVADO variable is exposed
 $ echo $XILINX_VIVADO
 /local/tool/Xilinx/Vivado/2015.4

Ensure you have all the necessary packages installed before attempting to build the RISC-V tools:

sudo apt-get install autoconf automake autotools-dev curl \
  libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison \
  flex texinfo gperf libncurses5-dev libusb-1.0-0 libboost-dev \
  git

Download the code release

The lowRISC chip git repository is hosted on GitHub . Instead of cloning individual sub-modules, we recommend cloning the entire repository to ensure all the sub-modules you acquire are compatible. Different versions of the sub-modules are not guaranteed to work.

To clone the whole lowRISC chip git repository:

# clone the repository to your home directory:
cd ~/lowRISC/DIR
# get the branch untether-v0.2
git clone -b untether-v0.2 --recursive https://github.com/lowrisc/lowrisc-chip.git
cd lowrisc-chip

There are 3 main branches:

To setup the necessary RISC-V variables use the setup script found at lowrisc-chip/set_riscv_env.sh:

# source this file
echo "Setting up lowRISC/RISC-V environment..."
echo "Make sure you source this script at the top of lowrisc-chip."
# Variables for lowRISC/RISC-V
if [ "$TOP" == "" ]; then
    echo "\$TOP is not available."
    echo "Set \$TOP to the top of lowrisc-chip which is the current directory."
    export TOP=$PWD
fi
export RISCV=$TOP/riscv
export PATH=$PATH:$RISCV/bin
# choose the FPGA board (KC705 in default)
export FPGA_BOARD=kc705

Structure of the git repository

Compiling and installation of individual tools/packages