Please join us October 9th-11th in Geneva, Switzerland for ORConf 2015. The event is kindly being hosted by CERN at the IdeaSquare. Last year’s ORConf was home to the first public talk on lowRISC and we’re delighted this year it will also be hosting a series of lowRISC and RISC-V discussions, serving as a European lowRISC and RISC-V workshop. ORConf has in recent years grown to cover a range of open source hardware topics beyond the original OpenRISC focus. Expect presentations and discussion on free and open source IP projects, implementations on FPGA and in silicon, verification, EDA tools, licensing and embedded software, to name a few.
The event will run from 13:00 until 18:30 on Friday, 09:30 until 19:30 on Saturday, and from 09:30 until 15:30 on Sunday. Friday will consist primarily of breakout sessions, planning, and discussion regarding lowRISC. If you are already contributing or your are thinking of getting involved and want to learn more, you are very welcome to join us. If you would like to present, do submit a proposal either via the link at the ORConf website or to me at email@example.com. We hope to see many of you there - please register here.