Our designs are permissively licensed and developed with collaborators from around the world. We implement the free and open RISC-V ISA.
We are pursuing novel security features such as tagged memory. Unlike proprietary offerings, all aspects of the design can be fully audited.
Hardware needs softening up - through minion cores we enable I/O interfaces and real-time control to be defined in software.
The lowRISC platform aims to be the "Linux of the hardware world", providing a high quality, secure, and open base for derivative designs. We will prove our design with volume silicon manufacture and an accompanying low-cost development board. Our goal is to lower the barrier of entry to producing custom silicon, establishing a vibrant ecosystem around secure and open hardware designs. lowRISC was formed as a not-for-profit community-driven organisation to pursue these aims.
Yesterday, lowRISC triggered a lot of discussion when someone submitted it to Hacker News. The comment thread became something of an impromptu Q+A about our project direction and status. I thought it was worth linking to it here and highlighting the discussion for a wider audience. If you have any additional questions, then feel free to comment on this blog post or else, as always, drop by our mailing list. Read More
Today is the second day of the fifth RISC-V workshop. I’ll be keeping a semi-live blog of talks and announcements throughout the day. OpenSoC System Architect: Farzad Fatollahi-Fard Current architectures are wasteful. Only a small fraction of chip area goes to computation. For both GoblinCore and OpenHPC, ended up doing a lot of similar work to achieve only a point design. Why not make a generator to avoid repeating the same steps? Read More
The fifth RISC-V workshop is going on today and tomorrow at the Google’s Quad Campus in Mountain View. I’ll be keeping a semi-live blog of talks and announcements throughout the day. Introduction: Rick O’Connor and Dom Rizzo This workshop is yet again bigger than the last. 350+ attendees, 107 companies, 29 universities. The next workshop will be May 9th-10 in Shanghai, China. RISC-V at UC San Diego: Michael Taylor Startup software stacks today look a light like an iceberg. Read More
This blog post is a slight departure from the normal topics here. Worry not, we’ll return to discussing Verilog, Chisel, and low-level software work soon. I wrote a quick script to help serve a need (producing a Gantt chart) and thought perhaps others would find it useful. There are a wide range of online services to help produce and maintain Gantt charts, but none quite offered what I was looking for. Read More